Full ARM7 TDMI simulation engine
- Instruction counting and cycle counting is provided.
- Support of Single-Stepping into/over code.
- Run at full speed, stopping either at program termination or at breakpoint or at user command.
- Restarting simulation or Reloading/Assembling from original files.
- Support of all exception modes.
- Support of all banked registers and SCPSR registers.
- FIQ/IRQ fully simulated and can be invoked by plugins.
- Support of Thumb instructions.
Docking Windows Interface
- Each view can be docked to any window edge, or be left as a floating window.
- Views can be hidden or grouped into a tabbed window.
- Views can hide when not needed and be activated by mouse activity.
- Window states are saved on application exit
Built-in ARM Assembler/Linker
- Source files are assembled according to the GNU/ARM asm specification.
- Linking to multiple source files and object/library files is supported.
- Original source code with address/opcodes displayed to user.
- Syntax and Semantic errors are displayed in the CodeView and highlighted for the user to review and fix.
- Errors are also listed in the ConsoleView. Double-clicking the error brings the offending source file
into focus and centers on the offending line.
- Projects consisting of multiple source files and object files can be defined.
- Object files and Library files are supported.
Configurable L1 Cache simulation and reporting
- The user can define an L1 cache for simulation and visualization.
- Direct Mapped, Fully Associative and Set Associative caches can be configured.
- Cache size, block size and replacement methods can be defined.
- Separate or Unified caches can be defined.
- Visualization of the cache contents are available via the user interface.
- Cache statistics are maintained and available to the user.
Built-in script engine for automated testing
- The ARMSim# can be run in a batch-mode environment.
- The user can write a "script" to control the simulator.
- Full access to the simulator allows the script to automate test a large selection of
assembly code submissions.
- The target code submission can be tested under a large number of test conditions.
- Results can be written to any destination data sink.
- Example scripts demonstrate using Excel as a data sink for test results.
VFP (Vector Floating Point) simulation
- Full VFP simulation via the VFP Coprocessor.
- Double(64 bit) and Single(32 bit) floating point numbers supported.
- Floating point registers can be inspected via the RegistersView.
- New instructions can be defined and mapped to undefined opcodes of the ARM processor.
- Instruction behavior is defined in an ARMSim# plugin.
- The ARM simulation engine calls the plugin assembly when the instruction is encountered.
- Instruction Mnemonic can be added to Assembler parsing tables so new instructions
can be assembled.
Memory Mapped IO extensions
- Custom behavior for reads and writes to the memory map can be defined.
- Read/Write behavior is defined in an ARMSim# plugin.
- The ARM simulation engine calls the plugin assembly when the memory mapped area
- Allows simulation of hardware such as Interrupt controllers, IO controllers, Timers
User interface extensions
- Users can request additional areas of the User Interface for custom use.
- User interface behavior is defined in an ARMSim# plugin
- This can be used with the Instruction Extension and the Memory Mapped IO extension
to visualize hardware devices.
- ARMSim# is implemented in C#
- It requires the .NET Framework version 3.0 or higher to be present.
- It also runs on Mac OS with Parallel and on Mac OS and Linux with the Mono implementation of the .NET framework version 3.0 or higher.